The present invention relates to the field of electro-optic display devices. More specifically, the present invention relates to active matrix liquid crystal displays which are multi-row addressable.
LCD devices used in such applications as high definition television are known to those skilled in the art. Examples of such devices, and in particular active matrix display devices, are provided by U.S. Pat. Nos. 4,239,346 and 5,056,895. In the interest of brevity, familiarity with these devices is assumed and the aforementioned patents are incorporated herein by reference in their entirety.
In modern uses of LCD devices, such as high definition television, there is an increasing need for greater display definition and performance. One way of increasing definition is to increase the number of pixel elements within a constant display area. However, increasing the number of elements in a prior art device tends to degrade the performance of the display.
One reason this degradation occurs is that adding pixels decreases the available scanning transfer time Ta for a row of elements, in a row-by-row scanning sequence, relative to the time needed to scan the entire matrix. Unfortunately, because pixels are connected to storage capacitors, Cpix, which require some time to fully charge, any reduction in Ta can degrade display performance.
Another reason is that adding pixel elements increases the total capacitive load seen by a column driver driving the pixel elements. In a typical LCD matrix array using transistors switches, a column driver is electrically connected to each transistor source, s, and associated substrate capacitance, Cs, within a column of the array. Therefore a column driver sees Cpix, the storage capacitor of a target pixel, as well as all Cs capacitors located in a column in a parallel combination. The combination of all Cs capacitors is substantial relative to the value of a single Cpix. The charging speed for the pixel capacitor, Cpix, may be slowed if the numbers of Cs capacitors within a column increases. Thus, adding pixels not only reduces the available scanning transfer time, Ta, but compounds the problem by increasing the capacitive load seen by a column driver. Both effects can combine to slow the transfer of a voltage signal to an LCD pixel.
In view of current applications requiring high display definition and high pixel count, it would be desirable to provide an array display device that reduces capacitive load seen by a column driver, and moreover, a method to increase scanning time, Ta, and thereby improve display performance.
One aspect of the invention provides an electro-optical display device which may include: an M row by N column matrix array of display elements; a plurality of pairs of transistor switches including a shared source, the source operably connected to the plurality of pairs of display elements, wherein the two elements are separately located in adjacent rows; a plurality of driving connectors operably connected to a plurality of Q non-contiguous rows of display elements; and a plurality of switch connectors operably connected to Q non-contiguous rows of display elements to allow electrical connection with driving signals from column drivers. Q can be a whole number 2 or greater. Sharing the transistors sources can eliminate one-half of substrate capacitance, Cs and the plurality of switch connectors allows concurrent, multi-row addressing of non-contiguous rows of elements.
In addition, the display device may include means to produce switching signals, such as row drivers, which enable a connection between a transistor source and the pixel storage capacitor, Cpix. And further, the device may include means for producing driving signals, such as column drivers having A/D converters that output analog voltage signals which charge Cpix and modulate light in the LCD pixel element.
In a preferred embodiment, each of M row drivers may be electrically connected to Q number of non-contiguous rows of transistors gates, and each of N column drivers may be electrically connected to M/Q*2 rows of transistor sources.
Another aspect of the invention provides a method of addressing an array of M by N display elements. The method can include: providing paired transistors, which act as switches to the display elements, the paired transistors sharing a source, and wherein the paired transistors are in contiguous rows; delivering Q number of concurrent enabling switching signals to Q rows of elements through electrical connections, wherein the rows of elements are non-contiguous; delivering independent signals to each enabled element in the non-contiguous rows; and transferring the signals to each enabled display element to modulate light. The method may further include: successively repeating the above steps to other groups of Q non-contiguous rows having elements not yet enabled, until the entire array has been addressed so that each element is enabled at least once. Q can be selected as a whole number two or greater.